Buffer Insertion for Bridges and Optimal Buffer Sizing for Communication Sub-System of Systems-on-Chip

TL;DR

This paper introduces an optimal buffer sizing and insertion method for on-chip communication subsystems using stochastic models and CTMDPs, addressing resource constraints in chip architectures.

Contribution

It presents a novel CTMDP-based methodology for buffer management in chip communication systems, including a linear decomposition approach for complex nonlinear problems.

Findings

Effective buffer resource management on-chip

Linear decomposition improves computational efficiency

Methodology applicable to bridge-based bus architectures

Abstract

We have presented an optimal buffer sizing and buffer insertion methodology which uses stochastic models of the architecture and Continuous Time Markov Decision Processes CTMDPs. Such a methodology is useful in managing the scarce buffer resources available on chip as compared to network based data communication which can have large buffer space. The modeling of this problem in terms of a CT-MDP framework lead to a nonlinear formulation due to usage of bridges in the bus architecture. We present a methodology to split the problem into several smaller though linear systems and we then solve these subsystems.