Hardware Support for Arbitrarily Complex Loop Structures in Embedded Applications
Nikolaos Kavvadias, Spiridon Nikolaidis

TL;DR
This paper introduces a zero-overhead loop controller (ZOLC) for embedded RISC processors that supports complex loop structures, significantly improving performance by up to 48.2%.
Contribution
The paper presents a novel ZOLC design enabling arbitrary loop structures with multiple entries and exits, enhancing embedded processor efficiency.
Findings
Speed improvements of 8.4% to 48.2% on benchmarks
ZOLC supports complex loop control structures
Enhanced processor performance with minimal overhead
Abstract
In this paper, the program control unit of an embedded RISC processor is enhanced with a novel zero-overhead loop controller (ZOLC) supporting arbitrary loop structures with multiple-entry/exit nodes. The ZOLC has been incorporated to an open RISC processor core to evaluate the performance of the proposed unit for alternative configurations of the selected processor. It is proven that speed improvements of 8.4% to 48.2% are feasible for the used benchmarks.
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Embedded Systems Design Techniques · Real-Time Systems Scheduling
