Practical Multiwriter Lock-Free Queues for "Hard Real-Time" Systems without CAS

TL;DR

This paper introduces a lock-free FIFO queue algorithm suitable for hard real-time embedded systems that avoids atomic CAS instructions, ensuring wait-free guarantees even under complex interrupt conditions.

Contribution

It presents a practical, CAS-free lock-free queue algorithm that guarantees first-in, almost first-out order in challenging real-time scenarios.

Findings

Provides wait-free guarantees for interrupt handlers

Eliminates ABA problem without special CPU instructions

Ensures robustness in embedded system message queues

Abstract

FIFO queues with a single reader and writer can be insufficient for "hard real-time" systems where interrupt handlers require wait-free guarantees when writing to message queues. We present an algorithm which elegantly and practically solves this problem on small processors that are often found in embedded systems. The algorithm does not require special CPU instructions (such as atomic CAS), and therefore is more robust than many existing methods that suffer the ABA problem associated with swing pointers. The algorithm gives "first-in, almost first-out" guarantees under pathological interrupt conditions, which manifests as arbitrary "shoving" among nearly-simultaneous arrivals at the end of the queue.