Spin Wave Magnetic NanoFabric: A New Approach to Spin-based Logic Circuitry

TL;DR

This paper introduces a magnetic NanoFabric for spin-based logic circuits that use spin wave phase encoding, enabling reconfigurable, low-device-count logic gates compatible with conventional electronics.

Contribution

It presents a novel NanoFabric design utilizing spin wave interference and phase encoding for reconfigurable logic, with experimental and modeling validation.

Findings

Demonstrated basic logic gates using spin wave interference

Achieved logic gate implementation with fewer devices than CMOS

Potential for scaling down to 0.1um2 for elementary gates

Abstract

We propose and describe a magnetic NanoFabric which provides a route to building reconfigurable spin-based logic circuits compatible with conventional electron-based devices. A distinctive feature of the proposed NanoFabric is that a bit of information is encoded into the phase of the spin wave signal. It makes possible to transmit information without the use of electric current and utilize wave interference for useful logic functionality. The basic elements include voltage-to-spin wave and wave-to-voltage converters, spin waveguides, a modulator, and a magnetoelectric cell. As an example of a magnetoelectric cell, we consider a two-phase piezoelectric-piezomagnetic system, where the spin wave signal modulation is due to the stress-induced anisotropy caused by the applied electric field. The performance of the basic elements is illustrated by experimental data and results of numerical modeling. The combination of the basic elements let us construct magnetic circuits for NOT and Majority logic gates. Logic gates AND, OR, NAND and NOR are shown to be constructed as the combination of NOT and a reconfigurable Majority gates. The examples of computational architectures such as Cellular Automata, Cellular Nonlinear Network and Field Programmable Gate Array are described. The main advantage of the proposed NanoFabric is in the ability to realize logic gates with less number of devices than it required for CMOS-based circuits. Potentially, the area of the elementary reconfigurable Majority gate can be scaled down to 0.1um2. The disadvantages and limitations of the proposed NanoFabric are discussed.