Efficient Divide-and-Conquer Implementations Of Symmetric FSAs

TL;DR

This paper introduces a divide-and-conquer method for implementing symmetric finite-state automata (FSA) that maintains manageable intermediate sizes, enabling efficient parallel processing and network applications.

Contribution

It presents a novel approach to convert symmetric FSAs into a divide-and-conquer process with bounded intermediate sizes, improving over traditional exponential memory methods.

Findings

Intermediate results are no larger than the original automaton's size.

Method enables efficient parallel processing of symmetric FSAs.

Applications include symmetric FSA networks.

Abstract

A deterministic finite-state automaton (FSA) is an abstract sequential machine that reads the symbols comprising an input word one at a time. An FSA is symmetric if its output is independent of the order in which the input symbols are read, i.e., if the output is invariant under permutations of the input. We show how to convert a symmetric FSA A into an automaton-like divide-and-conquer process whose intermediate results are no larger than the size of A's memory. In comparison, a similar result for general FSA's has been long known via functional composition, but entails an exponential increase in memory size. The new result has applications to parallel processing and symmetric FSA networks.