Reconfigurable Logic Gates Using Single-Electron Spin Transistors
Pham Nam Hai, Satoshi Sugahara, Masaaki Tanaka

TL;DR
This paper introduces reconfigurable logic gates based on single-electron spin transistors, leveraging magnetic configurations to dynamically alter logic functions, with simulations demonstrating their potential for flexible electronic circuit design.
Contribution
The paper presents novel reconfigurable logic gates using SESTs with magnetic control, enabling dynamic logic function changes without floating gates, supported by Monte Carlo simulations.
Findings
Successful simulation of reconfigurable AND/OR gates
Demonstration of logic gate reconfigurability via magnetic states
Potential for flexible, magnetic-controlled electronic circuits
Abstract
We propose and numerically analyze novel reconfigurable logic gates using "single-electron spin transistors" (SESTs), which are single-electron transistors (SETs) with ferromagnetic electrodes and islands. The output characteristics of a SEST depend on the relative magnetization configuration of the ferromagnetic island with respect to the magnetization of the source and the drain, i.e., high current drive capability in parallel magnetization and low current drive capability in antiparallel magnetization. The summation of multiple input signals can be achieved by directly coupling multiple input gate electrodes to the SEST island, without using a floating gate. A Tucker-type inverter with a variable threshold voltage, a reconfigurable AND/OR logic gate, and a reconfigurable logic gate for all symmetric Boolean functions are proposed and simulated using the Monte Carlo method.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
