Reliable Memories Built from Unreliable Components Based on Expander Graphs

TL;DR

This paper proposes a fault-tolerant memory architecture using low-density parity-check codes and expander graphs, demonstrating reliability under adversarial and independent failure models with lower redundancy than existing schemes.

Contribution

It introduces a new memory design based on expander graphs and LDPC codes, proving its reliability and efficiency compared to prior fault-tolerant memory architectures.

Findings

Reliable memory construction from unreliable components is possible using expander graphs.

The proposed architecture has lower redundancy than the Taylor-Kuznetsov scheme.

The approach is effective under both adversarial and independent failure models.

Abstract

In this paper, memories built from components subject to transient faults are considered. A fault-tolerant memory architecture based on low-density parity-check codes is proposed and the existence of reliable memories for the adversarial failure model is proved. The proof relies on the expansion property of the underlying Tanner graph of the code. An equivalence between the Taylor-Kuznetsov (TK) scheme and Gallager B algorithm is established and the results are extended to the independent failure model. It is also shown that the proposed memory architecture has lower redundancy compared to the TK scheme. The results are illustrated with specific numerical examples.