# A Low Complexity Algorithm and Architecture for Systematic Encoding of Hermitian Codes

## TL;DR

This paper introduces a low complexity, VLSI-implementable algorithm and architecture for systematic encoding of Hermitian codes, significantly reducing computational complexity and resource usage.

## Contribution

It proposes a novel algorithm and encoder architecture that achieves O(q^2) runtime and space complexity for Hermitian code encoding.

## Key findings

- Achieves O(q^2) runtime complexity
- Suitable for VLSI implementation
- Uses q varying-rate Reed-Solomon encoders

## Abstract

We present an algorithm for systematic encoding of Hermitian codes. For a Hermitian code defined over GF(q^2), the proposed algorithm achieves a run time complexity of O(q^2) and is suitable for VLSI implementation. The encoder architecture uses as main blocks q varying-rate Reed-Solomon encoders and achieves a space complexity of O(q^2) in terms of finite field multipliers and memory elements.