# Automated Generation of Layout and Control for Quantum Circuits

## TL;DR

This paper introduces a computer-aided design flow for quantum circuits that automates layout and control logic extraction, improving performance metrics like latency and pipelinability through novel heuristics.

## Contribution

It proposes two polynomial-time heuristics for quantum circuit layout and control, outperforming existing grid-based methods in key performance aspects.

## Key findings

- Grid-based layout performance varies fourfold with structure and placement.
- Dataflow-based heuristic yields better latency and pipelinability.
- Trade-off observed: improved performance at the expense of increased area.

## Abstract

We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we investigate grid-based layouts and show a performance variance of four times as we vary grid structure and initial qubit placement. We then propose two polynomial-time design heuristics: a greedy algorithm suitable for small, congestion-free quantum circuits and a dataflow-based analysis approach to placement and routing with implicit initial placement of qubits. Finally, we show that our dataflow-based heuristic generates better layouts than the state-of-the-art automated grid-based layout and scheduling mechanism in terms of latency and potential pipelinability, but at the cost of some area.